(Riispedia) PQ Labs Inc, unveiled QuantaFlow AI architecture recently. The new architecture includes a classical RISC-V processor, a QuantaFlow Generator and a QF Evolution Space. It is the first time for the industry to see such new architecture, which could change the future of AI and Deep Learning inference solutions.
QuantaFlow AI SoC architecture is designed to simulate massive parallel transformation / evolution that is very similar to Quantum Computation.
There are numerous approaches trying to bridge the gaps between Quantum-style algorithm implementations into real silicon of Artificial Intelligence. QuantaFlow is the answer from PQ Labs, Inc.
QuantaFlow simulates a virtual transformation / evolution space for qf-bit registers. A classical single-core RISC-V processor is implemented to provide logical control, results observation retrieval, etc. The QuantaFlow Generator converts input data from low dimensional space to high dimensional space and then starts continuous transformation / evolution. The process is of minimum granularity, highly parallel in nature and asynchronous. By the end of the process information needs to be extracted from the evolution space by Bit Observer unit. In addition, Hot-Patching can be used to change the evolution path of qf-bits dynamically. When a more significant deformation for the evolution space are needed, the RISC-V processor will issue a warm-“reboot” to the evolution space. All these operations can be executed in a blink of time. With the help of these dynamic operations, QuantaFlow is possible to run all kinds of neural network models e.g. ResNet-50 (2015), MobileNet (2017), EfficientNet (2019), etc.) without speed degradation or hitting the “memory wall.” By comparison, GPUs and ASIC AI accelerators degrade performance in newer models (MobileNet, EfficientNet), because these new models are all memory-bound.