Inside Quantum Technology

IBM’s “Quantum State of the Union” Video

(IBM) At this year’s IBM Quantum Summit, Jay Gambetta, IBM fellow and vice president, quantum computing, along with a few colleagues, delivered a report card and glimpse into future IBM plans. He highlighted six milestones–including the recent launch of IBM’s 127-qubit quantum processor, Eagle, and plans for IBM System Two, a new complete infrastructure that will supplant System One. IBM has posted a video of the talk, The IBM Quantum State of the Union.

Following are  brief summaries of the six topics reviewed by Gambetta and colleagues as summarized from HPC’s Jack Russell.

Breaking the 100-Qubit Barrier
IBM starts the formal counting of its current quantum processor portfolio with the introduction of the Falcon processor in 2019; it introduced IBM’s heavy-hexagonal qubit layout and has 27 qubits. IBM has been refining this design since. Hummingbird debuted in 2020 with 65 qubits. Eagle, just launched at the 2021 Summit, has 127 qubits. The qubit count has roughly doubled with each new processor. Next up is Osprey, due in 2022, which will have 433 qubits.

Overcoming the Gate Error Barrier
Measuring quality in quantum computing can be tricky. Key components such as coherence duration and gate fidelity are adversely affected by many factors usually lumped together as system and environmental noise. Taming these influences is why most quantum processors are housed in big dilution refrigerators. IBM developed a benchmark metric, Quantum Volume (QV), which has various performance attributes baked in and QV has been fairly widely used the quantum community. IBM achieved QV of 128 on some of its systems. Honeywell (now Quantinuum) also reported achieving QV 128 on its trapped ion device.

Mainstreaming Falcon r5<
Currently, the Falcon architecture is IBM’s workhorse. As explained by IBM, the portfolio of accessible QPUs includes core and exploratory chips: “Our users have access to the exploratory devices, but those devices are not online all the time. Premium users get access to both core and exploratory systems.”
IBM says there are three metrics that characterize system performance – quality, speed, and scale – and recently issued a white paper (brief excerpt at the article end) defining what’s meant by that. Speed is a core element and is defined as ‘primitive circuit layer operations per second’. IBM calls this CLOPS (catchy), roughly analogous to FLOPS in classical computing parlance.

IBM Systems All Support Qiskit Runtime
In May, IBM rolled out a beta version of Qiskit Runtime, which it says is “a new architecture offered by IBM Quantum that streamlines computations requiring many iterations.” The idea is to leverage classical systems to accelerate access to QPUs not unlike the way CPUs manage access to GPUs in classical computing. Qiskit Runtime is now supported by all IBM QPUs.

Serverless Quantum Introduction
Qiskit Runtime, says IBM, is part of a broader effort to bring classical and quantum resources closer together via the cloud and to create serverless quantum computing. This would be a big step in abstracting away many obstacles now faced by developers.
“Qiskit Runtime involves squeezing more performance from our QPU at the circuit level by combining it with classical resources to remove latency and increase efficiency. We call this classical with a little c,” said Sarah Sheldon, an IBM Research staff member. “We’ve also discovered we can use classical resources to accelerate progress towards quantum advantage and get us there earlier.”

Early Plans for System Two.
IBM’s final announcement was that it is “closing the chapter on” IBM Quantum System One, its fully enclosed quantum computer infrastructure, which debuted in 2019. Chow said System One would be able to handle Eagle, but that IBM was partnering with Finnish company Bluefors to develop System Two, its next generation cryogenic infrastructure.
“We are actively working on an entirely new set of technologies from novel high-density, cryogenic microwave flex cables to a new generation of FPGA based high-bandwidth, integrated control electronics,” said Chow.

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